http://www.embedded.com/design/211600580;jsessionid=QHYEN5J4ZGVYSQSNDLRSKH0CJUNN2JVN?pgno=2
By Keith Curtis
Embedded.com
(10/28/08, 12:18:00 HM EDT)
Super-capacitors are emerging as a possible alternative to batteries for energy-storage in some applications. However, the major advantages that super-capacitors offer must be balanced against some significant disadvantages.
On the plus side, super-capacitors have a virtually unlimited lifetime of around 10,000,000 charge/discharge cycles and they can charge and discharge at phenomenal currents in excess of 1,000 Amperes. They are also largely immune to temperature variations. However, they cannot compete with batteries in energy density or cost: typically super-capacitors offer just 3-5% of the energy density of Li-Ion batteries and cost 10 to 15 times more.
There are, however, some applications for which the advantages outweigh even these limitations. But super-capacitors also present two significant design challenges in how they charge and retrieve energy. With charging, the challenge is to transfer energy to the capacitor when it is completely discharged (effectively presenting a short circuit), while retrieving energy also becomes progressively more difficult as the capacitor voltage approaches 0V. Overcoming these two challenges is the main hurdle for the efficient use of super-capacitors as replacements to battery storage.
Figure 1: SMPS-based constant-current charger
The charging challenge
Linear chargers dissipate a large percentage of energy when charging a capacitor which is completely discharged. Then, as the capacitor charges, a smaller percentage of the energy is lost, and more energy makes it into the capacitor. Adding the power absorbed by the capacitor and the power dissipated in the charger, the charger will actually dissipate more than half of the available energy as heat, over a full charge cycle. In fact, a linear charger throws away almost 58% of the available charging energy as heat.
The other charging option is to use a system based on a Switch-Mode Power Supply (SMPS), where the difference between the output capacitor voltage and the source voltage is dropped across an inductor. In a voltage-regulated SMPS design (Figure 1, above) the inductor current is driven by the difference between the voltage across the output capacitor and a fixed reference voltage. This difference voltage is then amplified, integrated, and phase-shifted, before it is fed back into the Pulse-Width-Modulation (PWM) comparator.
The PWM comparator then uses that voltage to determine how much current to pump through the inductor on the next cycle. Often, SMPS circuits can achieve conversion efficiencies of greater than 80-90%, with careful design.
In the charger circuit, very little time is spent operating with a constant output voltage. By definition, the charger circuit is designed to do most of its work while ramping up the capacitor voltage from zero to the final voltage. It is during this charge-up period that energy transfer needs to be optimised.
The charging circuit requires a system that will regulate the charging current of the capacitor, independent of the output voltage, and only use the voltage feedback as the means of determining when the charge is complete. Figure 1 shows how this can be accomplished using a variation on the typical SMPS design. Here, the current in the inductor is regulated by comparing the current in the inductor against two fixed levels; one at the maximum desired current, and the other at the minimum.
Initially, it will take the inductor very little time to ramp up from the minimum to maximum current, as the voltage across the inductor is at its maximum. The discharge time will be correspondingly longer, as the inductor has to discharge into a relatively small voltage. As the charge in the capacitor increases, however, the voltage difference will drop, increasing the ramp-up time, and the capacitor voltage will rise, shortening the discharge time.
While something similar can be implemented with a traditional time-base driven PWM, the selection of the inductor becomes critical to maintaining the minimum current level. Additionally, instability can occur when the duty cycle is greater than 50%. A simple solution to avoid this instability is to use a relaxation-oscillator, 555 Timer-style system, using two comparators and a SR flip-flop, so that the inductor component values set the frequency.
Retrieving energy
Getting energy from the super-capacitor also presents challenges. It is easier to retrieve energy from a battery because it maintains a relatively flat discharge voltage as its charge is diminished. A capacitor, on the other hand, has a steep discharge slope that drops linearly from the full-charge voltage down to zero.
As there are few circuits that can operate effectively over this voltage range, it naturally follows that a SMPS-style boost circuit is required to convert the variable capacitor voltage into a reasonably constant load voltage.
As the capacitor voltage is now the source voltage for the SMPS, when it drops, the inductor current ramp-up time must increase if the output voltage is to remain constant. This seemingly trivial problem has one very serious consequence:
If the pulse of current delivered to the output remains constant, but the time between deliveries increases due to longer ramp-up times, the output voltage will begin to sag between deliveries. This means that, as the capacitor's charge is diminished, the output-voltage ripple will increase.
Given this behaviour, using a fixed inductor current is no longer possible, if the circuit is to maintain a reasonably constant output voltage. There are, however, three possible solutions. The first is to stack super-capacitors together, to extend the usable range of the retrieval circuitry, so that the lost capacity is a smaller percentage of the capacitor's total storage capacity.
Alternatively, declare a minimum operating charge voltage for the super-capacitor and shut down when the charge drops below this level, which effectively discards part of the super-capacitor's capacity as unusable. The third option is to limit the inductor current, so that the output of the retrieval circuit becomes increasingly current-limited as the charge diminishes.
Unfortunately, there are two problems with the series-stacked approach: First, there is the problem of balancing the charge in the capacitors, and the second concerns the SMPS design of the circuit retrieving energy from the capacitor. There are charge-balancing techniques that shunt charge current around the individual capacitors, based upon their charge voltage. One such technique uses a Zener diode in parallel with each capacitor. The second technique uses voltage comparators and MOSFET transistors to shunt the current, based upon a monitoring circuit.
The Zener diode circuit is by far the simplest solution. The problem is that Zener diodes do not have a perfectly sharp turn-on knee and actually start conducting below their Zener voltage. As a result, even when the capacitors are balanced, there will still be some conduction around the capacitors that is bleeding-off charge.
The active MOSFET charge balancer solves this problem through a more complex switching system. It monitors the voltage across the various capacitors in the string and when any capacitor reaches its maximum working voltage, the monitoring logic disconnects the capacitor from the string and shunts the charging current to the other capacitors to continue charging.
This eliminates the leakage-current problem, but at the cost of a more complex system for monitoring the voltages across all the capacitors. This additional circuitry also burns some of the charge current to power itself during the charging cycle, reducing the charging efficiency of the system.
The second problem with a series-stacked super-capacitors is the total voltage of the capacitor string. Initially, the stacked voltage will typically be higher than the required load voltage, necessitating a buck topology SMPS design. However, as the charge in the capacitors is depleted, the stacked voltage will eventually drop below the load voltage, as it ramps down to zero.
This means that, at some point in the discharge curve, the SMPS design will have to switch gears and become a boost topology SMPS design. An alternative solution is to put multiple super-capacitors in parallel, reducing the slope of the discharge line. There are several advantages to this method, including the fact that the capacitors will automatically charge-balance to a common voltage.
The charge will then route to those capacitors with greater capacitance without active direction, and the total voltage for the banked system remains low. This allows the use of a simple boost SMPS to retrieve power from the capacitors. The boost SMPS retrieval circuit can also pull more current from a parallel configuration, while reducing the I2R losses in the individual capacitors, because the current load is shared by all the devices.
While banking multiple super-capacitors in parallel reduces the slope of the capacitor voltage, it does not eliminate the basic problem, but merely delays it. When the capacitor voltage falls, the time to charge a fixed inductance increases. The only two solutions that are both simple and practical are to shut down the boost when the super-capacitor voltage drops below a reasonable minimum voltage, or to limit the inductor current as the charge in the super-capacitor is depleted.
The super-capacitor boost circuit does not need a fixed-current limit. Instead, what is needed, is a current limit that decreases as the capacitor voltage drops. This will correspondingly drop the maximum inductor current and maintain a reasonable ramp-up time.
To do this, the circuit can be modified so that the current-limit input is driven with feedback from the super-capacitor. This will reduce the maximum current linearly, with the reduction in voltage. This keeps the equation balanced and the maximum charge time reasonably constant, as the capacitor voltage drops to zero.
Figure 2: Composite charge-retrieval SMPS circuit
Adding intelligence
There is a certain similarity between the buck topology circuit used to charge the super-capacitor, and the boost topology circuit used to retrieve energy: Replacing the Flyback diode in the buck circuit with a synchronously switched MOSFET, creates the same power-chain circuit as replacing the Flyback diode in the boost circuit.
Figure 2 above shows what can be achieved with a little embedded intelligence. Re-routing the PWM signals to both MOSFETs, and re-routing the feedback and current-sense signals, creates a circuit that can, with some embedded intelligence, handle buck charging as well as boost retrieval. The intelligence can also be tasked with monitoring the capacitor, output and source voltages for charging, to determine which topology is required.
This circuit can either use a microcontroller with the necessary mixed-signal peripherals to build the conversion circuitry, or a simple microcontroller combined with an array of sufficiently programmable external mixed-signal devices to allow the required switching and control. The PIC family of microcontrollers includes both low-cost controllers, as well as versions which integrate mixed-signal peripherals optimised for power applications.
The use of super-capacitors for energy storage does have significant advantages, as well as disadvantages, compared to chemical, battery storage. Its extended life and immunity from temperature effects can make the super-capacitor the preferred storage medium, despite its cost and limited energy-density. The challenges associated with charging and retrieving energy from a super-capacitor system, however, also have to be factored into the cost/benefit analysis.
These challenges can be significant, but they can be handled with careful design and the inclusion of some simple embedded intelligence. Recent developments in the PIC microcontroller family include controllers which integrate many of the mixed-signal peripherals needed to implement SMPS-style charging and retrieval.
The addition of embedded intelligence can, therefore, help to reduce the size and cost of using super-capacitor storage as an alternative to conventional batteries.
Keith Curtis is Principal Applications Engineer in the Security, Microcontroller and Technology Development Division at Microchip Technology Inc.
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